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LAMBDA ADVANCED ANALOG INC.
PRELIMINARY
AFL5000S Series
Single Output, Hybrid - High Reliability DC/DC Converters
DESCRIPTION The AFL Series of DC/DC converters feature high power density with no derating over the full military temperature range. This series is offered as part of a complete family of converters providing single and dual output voltages and operating from nominal +28, +50, +120 or +270 volt inputs and output power ranging from 80 to 120 watts. For applications requiring higher output power, individual converters can be operated in parallel. The internal current sharing circuits assure accurate current distribution among the paralleled converters. This series incorporates Lambda Advanced Analog's proprietary magnetic pulse feedback technology providing optimum dynamic line and load regulation response. This feedback system samples the output voltage at the pulse width modulator fixed clock frequency, nominally 550 KHz. Multiple converters can be synchronized to a system clock in the 500 KHz to 700 KHz range or to the synchronization output of one converter. Undervoltage lockout, primary and secondary referenced inhibit, soft-start and load fault protection are provided on all models. These converters are hermetically packaged in two enclosure variations, utilizing copper core pins to minimize resistive DC losses. Three lead styles are available, each fabricated with Lambda Advanced Analog's rugged ceramic lead-to-package seal assuring long term hermeticity in the most harsh environments. Manufactured in a facility fully qualified to MIL-PRF38534, these converters are available in four screening grades to satisfy a wide range of requirements. The CH grade is fully compliant to the requirements of MIL-PRF-38534 for class H. The HB grade is fully processed and screened to the class H requirement, may not necessarily meet all of the other MIL-PRF-38534 requirements, e.g., element evaluation and Periodic Inspections (PI) not required. Both grades are tested to meet the complete group "A" test specification over the full military temperature range without output power deration. Two grades with more limited screening are also available for use in less demanding applications. Variations in electrical, mechanical and screening can be accommodated. Contact 1 FEATURES Lambda Advanced requirements. n n n n n n n n n n n n n n n n n Analog with specific
30 To 80 Volt Input Range 3.3, 5, 8, 9, 12, 15, 24 and 28 Volt Outputs Available High Power Density - up to 84 W / in3 Up To 120 Watt Output Power Parallel Operation with Stress and Current Sharing Low Profile (0.380") Seam Welded Package Ceramic Feedthru Copper Core Pins High Efficiency - to 85% Full Military Temperature Range Continuous Short Circuit and Overload Protection Remote Sensing Terminals Primary and Secondary Referenced Inhibit Functions Line Rejection > 40 dB - DC to 50 KHz External Synchronization Port Fault Tolerant Design Dual Output Versions Available Standard Military Drawings Available
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Input Voltage Soldering Temperature Case Temperature
PRELIMINARY
-0.5V to 100V 300C for 10 seconds Operating -55C to +125C Storage -65C to +135C -55C TCASE +125C, 30V VIN 80V unless otherwise specified.
Group A Subgroups Note 6 VIN = 50 Volts, 100% Load AFL5005S AFL5008S AFL5009S AFL5012S AFL5015S AFL5028S AFL5005S AFL5008S AFL5009S AFL5012S AFL5015S AFL5028S 1 1 1 1 1 1 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 VIN = 30, 50, 80 Volts - Note 6 AFL5005S AFL5008S AFL5009S AFL5012S AFL5015S AFL5028S 16.0 10.0 10.0 9.0 8.0 4.0 Note 6 AFL5005S AFL5008S AFL5009S AFL5012S AFL5015S AFL5028S 80 80 90 108 120 112 Note 1 VIN = 50 Volts, 100% Load - Note 1, 6 10,000 -0.015 4.95 7.92 8.91 11.88 14.85 27.72 4.90 7.84 8.82 11.76 14.70 27.44 5.00 8.00 9.00 12.00 15.00 28.00 Test Conditions Min 30 Nom 50
AFL50XXS
Static Characteristics
Parameter INPUT VOLTAGE OUTPUT VOLTAGE
Max 80
Unit V
5.05 8.08 9.09 12.12 15.15 28.28 5.10 8.16 9.18 12.24 15.30 28.56
V V V V V V V V V V V V
OUTPUT CURRENT
A A A A A A W W W W W W fd +0.015 %/C
OUTPUT POWER
MAXIMUM CAPACITIVE LOAD OUTPUT VOLTAGE TEMPERATURE COEFFICIENT OUTPUT VOLTAGE REGULATION AFL5028S Line All Others Line Load OUTPUT RIPPLE VOLTAGE AFL5005S AFL5008S AFL5009S AFL5012S AFL5015S AFL5028S INPUT CURRENT No Load Inhibit 1 Inhibit 2 1 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3
No Load, 50% Load, 100% Load VIN = 30, 50, 80 Volts
-70.0 -20.0 -1.0
+70.0 +20.0 +1.0 30 40 40 45 50 100 50 60 5 5
mV mV % mVpp mVpp mVpp mVpp mVpp mVpp mA mA mA mA
VIN = 30, 50, 80 Volts, 100% Load, BW = 10MHz
VIN = 50 Volts IOUT = 0 Pin 4 Shorted to Pin 2 Pin 12 Shorted to Pin 8
2
Static Characteristics
Parameter
(Continued)
Group A Subgroups
Test Conditions VIN = 50 Volts, 100% Load, BW = 10MHz
Min
Nom
Max
Unit
INPUT RIPPLE CURRENT AFL5005S AFL5008S AFL5009S AFL5012S AFL5015S AFL5028S CURRENT LIMIT POINT As a percentage of full rated load
1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 VOUT = 90% VNOM , VIN = 50 Volts Note 5
60 60 60 60 60 60
mApp mApp mApp mApp mApp mApp
1 2 3 1, 2, 3
115 105 125
125 115 140 32
% % % W % % % % % %
LOAD FAULT POWER DISSIPATION Overload or Short Circuit EFFICIENCY AFL5005S AFL5008S AFL5009S AFL5012S AFL5015S AFL5028S ENABLE INPUTS (Inhibit Function) Converter Off Sink Current Converter On Sink Current SWITCHING FREQUENCY SYNCHRONIZATION INPUT Frequency Range Pulse Amplitude, Hi Pulse Amplitude, Lo Pulse Rise Time Pulse Duty Cycle ISOLATION DEVICE WEIGHT MTBF
VIN = 50 Volts VIN = 50 Volts, 100% Load 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 Note 1 Note 1 1 Input to Output or Any Pin to Case (except Pin 3). Test @ 500VDC Slight Variations with Case Style MIL-HDBK-217F, AIF @ TC = 40C 300 Logical Low on Pin 4 or Pin 12 Note 1 Logical High on Pin 4 and Pin 12 - Note 9 Note 1 78 79 80 81 82 82 -0.5 2.0 500 500 2.0 -0.5 20 100 85 550 81 82 83 84 85 84 0.8 100 50 100 600 700 10 0.8 100 80
V A V A KHz KHz V V nSec % M gms KHrs
Dynamic Characteristics
-55C TCASE +125C, VIN = 50 Volts unless otherwise specified.
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Parameter LOAD TRANSIENT RESPONSE AFL5005S Amplitude Recovery Amplitude Recovery AFL5008S Amplitude Recovery Amplitude Recovery AFL5009S Amplitude Recovery Amplitude Recovery AFL5012S Amplitude Recovery Amplitude Recovery AFL5015S Amplitude Recovery Amplitude Recovery AFL5028S Amplitude Recovery Amplitude Recovery LINE TRANSIENT RESPONSE Amplitude Recovery TURN-ON CHARACTERISTICS Overshoot Delay LOAD FAULT RECOVERY LINE REJECTION
Group A Subgroups Note 2, 8 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6
Test Conditions
Min
Nom
Max
Unit
Load Step 50% 100% Load Step 10% 50% Load Step 50% 100% Load Step 10% 50% Load Step 50% 100% Load Step 10% 50% Load Step 50% 100% Load Step 10% 50% Load Step 50% 100% Load Step 10% 50% Load Step 50% 100% Load Step 10% 50% Note 1, 2, 3 VIN Step = 30 80 Volts VIN = 30, 50, 80 Volts. Note 4
-450 -450 -500 -500 -600 -600 -750 -750 -750 -750 -1200 -1200
450 200 450 300 500 200 500 300 600 200 600 300 750 200 750 300 750 200 750 300 1200 200 1200 300
mV Sec mV Sec mV Sec mV Sec mV Sec mV Sec mV Sec mV Sec mV Sec mV Sec mV Sec mV Sec
-500
500 500
mV Sec
4, 5, 6 4, 5, 6
Enable 1, 2 on. (Pins 4, 12 high or open) 50 Same as Turn On Characteristics. MIL-STD-461D, CS101, 30Hz to 50KHz Note 1 40 50 75
250 120
mV mSec
dB
Notes to Specifications: 1. 2. 3. 4. 5. 6. 7. 8. 9. Parameters not 100% tested but are guaranteed to the limits specified in the table. Recovery time is measured from the initiation of the transient to where VOUT has returned to within 1% of VOUT at 50% load. Line transient transition time 100 Sec. Turn-on delay is measured with an input voltage rise time of between 100 and 500 volts per millisecond. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal. Parameter verified as part of another test. All electrical tests are performed with the remote sense leads connected to the output leads at the load. Load transient transition time 10 Sec. Enable inputs internally pulled high. Nominal open circuit voltage 4.0VDC.
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AFL5000S Case Outlines
Case X Case W
Pin Variation of Case Y
3.000
o 0.128
2.760 0.050 0.250 0.250
0.050
12
7
0.25 typ
12
7
1 6
1.260 1.500
1.000 Ref
0.200 Typ Non-cum Pin o 0.040
1.000
2.500
0.220
Pin o 0.040 0.220 2.800
2.975 max 0.238 max
0.525 0.42 0.380 Max 0.380 Max
Case Y
Case Z
Pin Variation of Case Y
1.150
0.300 o 0.140 0.050 0.050
0.250
0.250
1 6
1.500 1.750 2.00
1.000 Ref
0.200 Typ Non-cum Pin o 0.040
1.000 Ref
Pin o 0.040 0.220 0.36 2.800
1.750 2.500 2.975 max 0.238 max
0.375
0.220
0.525
0.380 Max
0.380 Max
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AFL5000S Pin Designation
Pin No.
1 2 3 4 5 6 7 8 9 10 11 12
Designation
Positive Input Input Return Case Enable 1 Sync Output Sync Input Positive Output Output Return Return Sense Positive Sense Share Enable 2
Available Screening Levels and Process Variations for AFL 5000S Series.
MIL-STD-883 Method No Suffix
-20C to +85C
Requirement
Temperature Range Element Evaluation Internal Visual Temperature Cycle Constant Acceleration Burn-in Final Electrical (Group A) Seal, Fine & Gross External Visual
ES Suffix
-55C to +125C
HB Suffix
-55C to +125C
CH Suffix
-55C to +125C MIL-PRF-38534
2017 1010 2001, 1015 MIL-PRF-38534 1014 2009
Yes Cond B 500g
Yes Cond C Cond A 160hrs @ 125C -55, +25, +125C Cond A, C Yes
Yes Cond C Cond A 160hrs @ 125C -55, +25, +125C Cond A, C Yes
96hrs @ 125C 25C
96hrs @ 125C 25C Cond A, C Yes
per Commercial Standards
Part Numbering
AFL 50 05 S X / CH
Model Input Voltage
28= 28 V, 50= 50 V 120=120 V, 270= 270 V
Screening Case Style
W, X, Y, Z
- , ES HB, CH
Output Voltage
03.3= 3.3 V, 05= 5 V 08= 8 V, 09= 9 V 12= 12 V, 15= 15 V 24= 24 V, 28= 28 V
Outputs
S = Single D = Dual
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AFL5000S Circuit Description
Figure I. AFL Single Output Block Diagram
DC Input 1
Input Filter Output Filter Current Sense 7 10 +Output +Sense
Enable 1 4
Primary Bias Supply
Sync Output
5 Control
FB
Sync Input 6 Case 3
Error Amp & Ref
Share Amplifier Sense Amplifier
11 Share 12 Enable 2 9 8 -Sense Output Return
Input Return 2
Circuit Operation and Application Information The AFL series of converters employ a forward switched mode converter topology. (refer to Figure I.) Operation of the device is initiated when a DC voltage whose magnitude is within the specified input limits is applied between pins 1 and 2. If pin 4 is enabled (at a logical 1 or open) the primary bias supply will begin generating a regulated housekeeping voltage bringing the circuitry on the primary side of the converter to life. A power MOSFET is used to chop the DC input voltage into a high frequency square wave, applying this chopped voltage to the power transformer at the nominal converter switching frequency. Maintaining a DC voltage within the specified operating range at the input assures continuous generation of the primary bias voltage. The switched voltage impressed on the secondary output transformer winding is rectified and filtered to generate the converter DC output voltage. An error amplifier on the secondary side compares the output voltage to a precision reference and generates an error signal proportional to the difference. This error signal is magnetically coupled through the feedback transformer into the controller section of the converter varying the pulse width of the square wave signal driving the MOSFET, narrowing the width if the output voltage is too high and widening it if it is too low, thereby regulating the output voltage. Remote Sensing
load when their physical separation could cause undesirable voltage drop. This connection allows regulation to the placard voltage at the point of application. When the remote sensing feature is not used, the sense leads should be connected to their respective output terminals at the converter. Figure III. illustrates a typical remotely sensed application. Inhibiting Converter Output As an alternative to application and removal of the DC voltage to the input, the user can control the converter output by providing TTL compatible, positive logic signals to either of two enable pins (pin 4 or 12). The distinction between these two signal ports is that enable 1 (pin 4) is referenced to the input return (pin 2) while enable 2 (pin 12) is referenced to the output return (pin 8). Thus, the user has access to an inhibit function on either side of the isolation barrier. Each port is internally pulled "high" so that when not used, an open connection on both enable pins permits normal converter operation. When their use is desired, a logical "low" on either port will shut the converter down. Figure II. Enable Input Equivalent Circuit
+5.6V 100K
Pin 4 or Pin 12
1N4148
290K 2N3904
Disable
Connection of the + and - sense leads at a remotely located load permits compensation for excessive resistance between the converter output and the 7
150K Pin 2 or Pin 8
Internally, these ports differ slightly in their function. In use, a low on Enable 1 completely shuts down all circuits in the converter while a low on Enable 2 shuts down the secondary side while altering the controller duty cycle to near zero. Externally, the use of either port is transparent save for minor differences in standby current. (See specification table). Synchronization of Multiple Converters When operating multiple converters, system requirements often dictate operation of the converters at a common frequency. To accommodate this requirement, the AFL series converters provide both a synchronization input and a synchronization output. The sync input port permits synchronization of an AFL converter to any compatible external frequency source operating between 500 and 700 KHz. This input signal should be referenced to the input return and have a 10% to 90% duty cycle. Compatibility
requires transition times less than 100 ns, maximum low level of +0.8 volts and a minimum high level of +2.0 volts. The sync output of another converter which has been designated as the master oscillator provides a convenient frequency source for this mode of operation. When external synchronization is not required, the sync in pin should be left open (unconnected) thereby permitting the converter to operate at its' own internally set frequency. The sync output signal is a continuous pulse train set at 550 50 KHz, with a duty cycle of 15 5%. This signal is referenced to the input return and has been tailored to be compatible with the AFL sync input port. Transition times are less than 100 ns and the low level output impedance is less than 50 ohms. This signal is active when the DC input voltage is within the specified operating range and the converter is not inhibited. This output has adequate drive reserve to synchronize at least five additional converters. A typical connection is illustrated in Figure III.
Figure III. Preferred Connection for Parallel Operation
Power Input
1 12
Vin Rtn Case Enable 1 Sync Out Sync In
Enable 2 Share
AFL
+ Sense - Sense Return + Vout
7
Optional Synchronization Connection
6
Share Bus
1 12
Vin Rtn Case Enable 1 Sync Out Sync In
6
Enable 2 Share
AFL
+ Sense - Sense Return + Vout
7
to Load
1
12
Vin Rtn Case Enable 1 Sync Out Sync In
6
Enable 2 Share
AFL
+ Sense - Sense Return + Vout
7
(Other Converters)
Parallel Operation -- Current and Stress Sharing Figure III. illustrates the preferred connection scheme for operation of a set of AFL converters with outputs operating in parallel. Use of this connection 8
permits equal sharing among the members of a set where total load current exceeds the capacity of an individual AFL. An important feature of the AFL series operating in the parallel mode is that in addition to sharing the current, the stress induced by
temperature will also be shared. Thus if one member of a paralleled set is operating at a higher case temperature, the current it provides to the load will be reduced as compensation for the temperature induced stress on that device. When operating in the shared mode, it is important that symmetry of connection be maintained as an assurance of optimum load sharing performance. Thus, converter outputs should be connected to the load with equal lengths of wire of the same gauge and sense leads from each converter should be connected to a common physical point, preferably at the load along with the converter output and return leads. All converters in a paralleled set must have their share pins connected together. This arrangement is diagrammatically illustrated in Figure III. showing the outputs and sense pins connected at a star point which is located close as possible to the load. As a consequence of the topology utilized in the current sharing circuit, the share pin may be used for other functions. In applications requiring only a single converter, the voltage appearing on the share pin may be used as a "current monitor". The share pin open circuit voltage is nominally +1.00v at no load and increases linearly with increasing output current to +2.20v at full load. Thermal Considerations Because of the incorporation of many innovative technological concepts, the AFL series of converters is capable of providing very high output power from a package of very small volume. These magnitudes of power density can only be obtained by combining high circuit efficiency with effective methods of heat removal from the die junctions. This requirement has been effectively addressed inside the device; but when operating at maximum loads, a significant amount of heat will be generated and this heat must be conducted away from the case. To maintain the case temperature at or below the specified maximum of 125C, this heat must be transferred by conduction to an appropriate heat dissipater held in intimate contact with the converter base-plate. Since the effectiveness of this heat transfer is dependent on the intimacy of the baseplate-heatsink interface, it is strongly recommended that a high thermal conductivity heat transferring medium is inserted between the baseplate and heatsink. The material most frequently utilized at the factory during all testing and burn-in processes is sold
under the trade name of Sil-Pad(R) 4001. This particular product is an insulator but electrically conductive versions are also available. Use of these materials assures maximum surface contact with the heat dissipater thereby compensating for any minor surface variations. While other available types of heat conductive materials and thermal compounds provide similar effectiveness, these alternatives are often less convenient and are frequently messy to use. A conservative aid to estimating the total heat sink surface area (AHEAT SINK) required to set the maximum case temperature rise (T) above ambient temperature is given by the following expression:
. T -143 - 3.0 A HEAT SINK 80P 0.85
where T = Case temperature rise above ambient 1 P = Device dissipation in Watts = POUT - 1 Eff As an example, it is desired to maintain the case temperature of an AFL5015S at +85C while operating in an open area whose ambient temperature is held at a constant +25C; then T = 85 - 25 = 60C. If the worst case full load efficiency for this device is 83%; then the power dissipation at full load is given by 1 P = 120 * - 1 = 120 * ( 0.205) = 24.6W .83 and the required heat sink area is -1.43 60 A HEAT SINK = - 3.0 = 71 in 2 80 * 24.6 0.85 Thus, a total heat sink surface area (including fins, if any) of 71 in2 in this example, would limit case rise to 60C above ambient. A flat aluminum plate, 0.25" thick and of approximate dimension 4" by 9" (36 in2 per side) would suffice for this application in a still air environment. Note that to meet the criteria in this example, both sides of the plate require unrestricted exposure to the ambient air.
1Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN
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Input Filter The AFL5000S series converters incorporate a LC input filter whose elements dominate the input load impedance characteristic at turn-on. The input circuit is as shown in Figure IV. Figure IV. Input Filter Circuit
Finding a resistor value for a particular output voltage, is simply a matter of substituting the desired output voltage and the nominal device voltage into the equation and solving for the corresponding resistor value. Figure V. Connection for VOUT Adjustment
Enable 2
2.1uH
Share
Pin 1
0.94uF
R ADJ
AFL50xxS
+ Sense - Sense Return To Load + Vout
Pin 2
Note: Radj must be set 500
Undervoltage Lockout A minimum voltage is required at the input of the converter to initiate operation. This voltage is set to 25 2 volts. To preclude the possibility of noise or other variations at the input falsely initiating and halting converter operation, a hysteresis of approximately 2 volts is incorporated in this circuit. Thus if the input voltage droops to 23 2 volts, the converter will shut down and remain inoperative until the input voltage returns to 25 volts. Output Voltage Adjust In addition to permitting close voltage regulation of remotely located loads, it is possible to utilize the converter sense pins to incrementally increase the output voltage over a limited range. The adjustments made possible by this method are intended as a means to "trim" the output to a voltage setting for some particular application, but are not intended to create an adjustable output converter. These output voltage setting variations are obtained by connecting an appropriate resistor value between the +sense and -sense pins while connecting the sense pin to the output return pin as shown in Figure V. below. The range of adjustment and corresponding range of resistance values can be determined by use of the following equation. VNOM = 100 * VOUT - VNOM -.025
Attempts to adjust the output voltage to a value greater than 120% of nominal should be avoided because of the potential of exceeding internal component stress ratings and subsequent operation to failure. Under no circumstance should the external setting resistor be made less than 500. By remaining within this specified range of values, completely safe operation fully within normal component derating limits is assured. Examination of the equation relating output voltage and resistor value reveals a special benefit of the circuit topology utilized for remote sensing of output voltage in the AFL5000S series of converters. It is apparent that as the resistance increases, the output voltage approaches the nominal set value of the device. In fact the calculated limiting value of output voltage as the adjusting resistor becomes very large is 25mV above nominal device voltage. The consequence is that if the +sense connection is unintentionally broken, an AFL50xxS has a fail-safe output voltage of Vout + 25mV, where the 25mV is independent of the nominal output voltage. It can be further demonstrated that in the event of both the + and - sense connections being broken, the output will be limited to Vout + 440mV. This 440 mV is also essentially constant independent of the nominal output voltage. General Application Information The AFL5000 series of converters are capable of providing large transient currents to user loads on demand. Because the nominal input voltage range in this series is relatively low, the resulting input current demands will be correspondingly large. It is important therefore, that the line impedance be kept very low to prevent steady state and transient input currents from degrading the supply voltage between 10
Radj
Where VNOM = device nominal output voltage, and VOUT = desired output voltage
the voltage source and the converter input. In applications requiring high static currents and large transients, it is recommended that the input leads be made of adequate size to minimize resistive losses, and that a good quality capacitor of approximately 100fd be connected directly across the input terminals to assure an adequately low impedance at the input terminals. Table I relates nominal resistance values and selected wire sizes. Table I. Nominal Resistance Of Cu Wire Wire Size, AWG 24 Ga 22 Ga 20 Ga 18 Ga 16 Ga 14 Ga 12 Ga Resistance per ft 25.7 m 16.2 m 10.1 m 6.4 m 4.0 m 2.5 m 1.6 m
Incorporation of a 100 fd capacitor at the input terminals is recommended as compensation for the dynamic effects of the parasitic resistance of the input cable reacting with the complex impedance of the converter input, and to provide an energy reservoir for transient input current requirements.
Figure VI. Problems of Parasitic Resistance in Input Leads (See text)
Rp
Iin
100 fd
Vin eRtn Rtn Case
esource
Rp
IRtn
System Ground
Enable 1 Sync Out Sync In
11
(c)Lambda Advanced Analog
The information in this data sheet has been carefully checked and is believed to be accurate; however no responsibility is assumed for possible errors. These specifications are subject to change without notice.
980812
LAMBDA ADVANCED ANALOG INC.
MIL-PRF-38534 Qualified ISO9001 Registered
2270 Martin Avenue Santa Clara CA 95050-2781 (408) 988-4930 FAX (408) 988-2702
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